JTAG

The ~TRST pin for JTAG emulation is not currently implemented on our JTAG dongle as CPLDs and FPGAs do no use this pin. Unfortunately, the ~TRST pin is supposed to be pulled low while the JTAG interface is not in use and is supposed to be pulled high when the JTAG interface is in use. For this reason pin 4 of the 10-pin programming dongle will be tied to Vcc of the board (pin 2) through a 3.3K resistor. On the board side, ~TRST will be pulled low by a 47K resistor.

Beyond learning about the JTAG standard and finishing the implementation of JTAG on the board I also finished the SPI interface and most of the audio codec. I need to finish drawing the power supply, the RS232 interface and the connectors and then go through and verify the entire design.